The Long Tug of War Between Computing Power and Energy

Key Takeaways

• Computing power has grown more than a trillionfold since ENIAC, but energy never came free.
• Dennard scaling broke around 2005, ending cheap gains in clock speed at flat power.
• AI data centers are pushing energy back to the center of computing’s story.

From ENIAC’s 150 Kilowatts to the First Transistors

ENIAC, switched on at the University of Pennsylvania in 1945, drew about 150 kilowatts of electricity to manage roughly 5,000 additions per second. A phone in a pocket today performs billions of operations each second on a battery the size of a credit card. That distance between what machines calculate and what they consume sits at the center of the relationship between computing power and energy, a relationship that has shaped chip design, supercomputing, and the build-out of data centers for artificial intelligence.

ENIAC ran on more than 17,000 vacuum tubes. Each tube behaved like a tiny, hot, fragile switch, and tubes failed often enough that the machine sat idle for long stretches during its early life. Heat was the constant enemy. The room needed dedicated power lines and its own cooling, and local legend held that lights dimmed when the machine started a run.

The escape from that heat arrived in 1947, when researchers at Bell Labs built the first working transistor. John Bardeen, Walter Brattain, and William Shockley had made a solid-state switch with no glowing filament and a fraction of the energy cost per operation. A decade later, Jack Kilby at Texas Instruments and Robert Noyce at Fairchild Semiconductor independently developed the integrated circuit, placing many transistors on a single piece of silicon.

Every logical operation costs energy, because every switch that flips has to charge and discharge tiny electrical loads. Vacuum tubes paid that cost in watts. Transistors paid it in a tiny fraction of a watt, and integrated circuits packed thousands, then millions, of them together. The early decades of the industry were, in large part, a story about driving the energy per operation down far enough that the machines could keep growing without melting.

Moore’s Law and Dennard Scaling, the Decades of Almost Free Power

In 1965, Fairchild researcher Gordon Moore observed that the number of components manufacturers could economically fit on a chip was doubling at a steady pace. He revised the cadence in 1975 to roughly every two years, and the pattern became known as Moore’s Law. More transistors meant more capability, and for a long stretch that capability kept getting cheaper per unit.

Raw transistor counts tell only half the story. The reason chips got faster as well as denser came from a 1974 paper by IBM engineer Robert Dennard and his colleagues. Their observation, later called Dennard scaling, held that as a transistor shrinks, its power density stays roughly constant. Voltage and current drop in step with the smaller dimensions, so a chip of a given size could hold more transistors, switch them faster, and still draw about the same total power.

The practical payoff was extraordinary. Each new manufacturing generation delivered transistors that were smaller, faster, and no thirstier per unit area. Chip designers could raise clock frequencies generation after generation, climbing from a few megahertz in the 1970s into the gigahertz range by the early 2000s, without the power budget spiraling out of control. Software developers grew accustomed to a simple bargain: write a program once, and next year’s hardware would run it faster at no extra cost in effort.

That bargain held for about three decades. It quietly trained an entire industry, and the people who funded and used it, to expect that computing power would keep rising while the energy bill stayed manageable. Few assumptions in technology have been so widely shared. The trouble was that Dennard’s neat arithmetic depended on physical conditions that could not hold forever, and the conditions began to break down once transistors reached a certain smallness.

The Power Wall and the Turn to Many Cores

Around 2005, the physics stopped cooperating. Below roughly the 90-nanometer manufacturing node, two effects that Dennard’s model had treated as negligible grew impossible to ignore. Threshold voltage could no longer scale down cleanly, and leakage current, the trickle of power a transistor wastes even when nominally switched off, climbed sharply. Power density started rising with each generation instead of holding flat.

Engineers ran straight into what they named the power wall. Practical clock frequencies stalled near 4 gigahertz, a ceiling that has barely moved since 2006. Pushing higher meant generating more heat than a chip could shed without exotic and expensive cooling. Intel felt the wall directly in 2004 when it canceled its planned Tejas and Jayhawk processors, designs that had been headed toward very high frequencies, because their thermal demands had become unworkable.

The industry’s answer was to stop chasing speed in a single core and start adding cores instead. Rather than one processor running at an impossible 8 gigahertz, a chip might carry four cores at a sustainable 3 gigahertz, splitting work across them. Multicore designs spread quickly through laptops, servers, and phones. Graphics processors, built from thousands of simple cores running in parallel, moved from rendering games toward general computation.

Parallelism came with its own catch. Many programs cannot be neatly divided across cores, a limit captured decades earlier by Amdahl’s law, so doubling cores rarely doubles real-world speed. A subtler problem emerged too. Once a chip holds more transistors than its power budget can switch at the same time, some must sit dark, powered down, at any given moment. Researchers called this dark silicon, and a 2011 study framed it as a limit on how far multicore scaling could go. Computing power kept rising, but the easy, automatic part of the climb was over.

Koomey’s Law and the Arithmetic of Efficiency

There is a more hopeful pattern running alongside the gloom of the power wall, and it belongs to physicist and analyst Jonathan Koomey. Studying decades of hardware data, he found that the number of computations a machine could perform per joule of energy had been doubling about every 1.57 years since the 1950s. The fit was remarkably tight, with a statistical correlation above 98 percent across more than half a century. The pattern became known as Koomey’s law.

Stated plainly, the energy needed for a fixed amount of computing fell by half roughly every year and a half. For battery-powered devices, that compounding mattered as much as raw speed, because it meant the same task could run on a smaller, lighter, longer-lasting battery with each passing cycle. The smartphone, the smartwatch, and the wireless earbud all depend on that long decline in energy per operation.

The cadence did slow. When Koomey re-examined the record after 2000, the doubling time stretched to about 2.6 years, tracking the end of Dennard scaling and the broader slowdown of Moore’s Law. A 2024 study of high-performance machines from 2008 to 2023 put the recent figure near a doubling every 2.29 years, still exponential, just gentler than the historical peak. The four ideas that govern this whole story, summarized below, pull in different directions.

The principles that describe computing power and energy each capture a distinct truth, and their status today differs sharply.

Supercomputers and the Twenty Megawatt Bargain

Few places make the trade-off between capability and electricity as visible as the world of supercomputers. In 2008, the United States Defense Advanced Research Projects Agency (DARPA) set what looked like a fantastical goal: build a machine capable of one exaflop, a quintillion calculations per second, inside a power envelope of 20 megawatts. Studies at the time suggested such a system might instead demand somewhere between 150 and 500 megawatts, enough to power a small city, so the target drew open skepticism.

The skeptics were proven wrong in 2022. The Frontier system at Oak Ridge National Laboratory became the first computer to cross the exascale line on the TOP500 ranking, posting 1.1 exaflops on the standard Linpack benchmark while drawing about 21 megawatts. Engineers had chased efficiency at every level, from the chips to the cooling towers, and landed just inside DARPA’s once-doubted budget. Frontier delivered roughly 52 billion operations per second for every watt it consumed.

The crown later passed to El Capitan at Lawrence Livermore National Laboratory, which took the top TOP500 spot in November 2024 and held it through late 2025. Built for the National Nuclear Security Administration’s stockpile work, it reached 1.809 exaflops at a power draw near 30 megawatts. Each new champion did more computing, and each also pulled more raw power than the last, even as efficiency per calculation kept improving.

The progression of these flagship machines shows both halves of the pattern at once.

A single laboratory campus now budgets tens of megawatts for one machine, the kind of load that once described a factory. The efficiency gains are real, and the appetite keeps growing anyway.

Computing Power and Energy in the Age of AI Data Centers

The tension between computing power and energy left the research lab and entered national electricity planning once artificial intelligence began consuming hardware at scale. According to the International Energy Agency, data centers worldwide used roughly 415 to 460 terawatt-hours of electricity in 2024, already comparable to the total consumption of a mid-sized industrial country. The agency projects that figure will roughly double to around 945 terawatt-hours by 2030, reaching close to 3 percent of global electricity demand.

The growth is steep and recent. An April 2026 IEA update found that data center electricity use jumped about 17 percent in 2025 alone, more than five times the 3 percent growth in overall electricity demand that year. Spending tracked the same curve, with five large technology companies pouring more than 400 billion dollars into capacity in 2025 and planning a further increase the following year. AI-focused facilities are the fastest-rising slice, with their power use on course to triple by the end of the decade.

A paradox sits inside these numbers. The IEA also reports that the power consumed per individual AI task is falling quickly, with efficiency improving at a pace it calls unusual even by the standards of energy history. Both things are true at once: each computation gets cheaper in energy terms, and total consumption still climbs, because cheaper computing invites far more of it. More people use these tools, and uses such as autonomous AI agents run continuously rather than in short bursts.

The constraint has shifted from the silicon to the grid. Developers now face slow connection queues, and roughly 20 percent of planned projects risk delay without new transmission. Technology firms signed about 40 percent of all corporate renewable power agreements in 2025, and a pipeline of small modular reactor deals tied to data centers grew from 25 to 45 gigawatts within a year. Many builders, unable to wait for the grid, are turning to on-site natural gas. The question for the sector is no longer whether a chip can run cool, but whether a region can supply the electricity at all.

Landauer’s Limit and the Floor Beneath Computing

Underneath every chip, benchmark, and electricity forecast lies a hard physical boundary that no amount of engineering can erase. In 1961, IBM physicist Rolf Landauer argued that information is physical, and that erasing a single bit must release a minimum amount of energy as heat. The quantity, now called Landauer’s principle, equals the Boltzmann constant times the temperature times the natural logarithm of 2. At room temperature, that comes to about 2.9 times 10 to the minus 21 joules per bit.

That number is almost unimaginably small. The gap between it and real hardware has been the room in which decades of efficiency gains have played out. As of 2012, practical computers were spending roughly a billion times more energy per operation than the Landauer floor, which means the physics has never been the binding constraint in everyday machines. The waste came from engineering, voltage margins, leakage, and the overhead of moving data, all of which can in principle be reduced.

Laboratory work has crept close to the limit at the level of a single device. In 2016, researchers measured the energy dissipated when they flipped a nanomagnetic bit and found it sat only about 44 percent above the Landauer minimum. That result confirmed the principle experimentally and showed that the floor is a real physical target rather than a mathematical curiosity. Scaling such precision to a full processor running billions of operations a second is a separate and unsolved problem.

One theoretical escape route exists. The Landauer cost applies to erasing information, so a machine that computes without discarding bits, an idea called reversible computing, could in principle sidestep the floor entirely. Practical reversible processors remain difficult to build. Even so, the long arc is clear enough. Conventional chips have a vast but finite distance left to fall before they meet a wall set not by manufacturing but by thermodynamics itself.

Summary

The word “versus” in the phrase computing power and energy is slightly misleading. The two have not been opponents so much as partners moving in lockstep, with efficiency and demand both rising for eighty years. Every time engineers cut the energy per operation, the world found new computations to fill the space they opened, from spreadsheets to streaming video to large AI models. That dynamic, where greater efficiency feeds greater total use, explains why the electricity bill has never shrunk even as each individual calculation grew cheaper.

What has changed is the location of the binding constraint. For ENIAC, the limit was heat in a single room. For the chip industry after 2005, it was power density on a sliver of silicon. Today it is the capacity of regional power grids and the speed at which utilities, reactors, and gas plants can be brought online. The next limit, still distant but fixed, is the thermodynamic floor that Landauer identified in 1961. Each constraint has been pushed back by ingenuity, and each has reappeared one level higher. The useful question is not whether computing can keep getting more efficient, because it can, but where society chooses to spend the abundance that efficiency keeps creating.

Appendix: Useful Books Available on Amazon

• Chip War
• The Innovators
• The Idea Factory
• The Information
• The Soul of a New Machine
• Energy and Civilization

Appendix: Top Questions Answered in This Article

How did ENIAC’s power use compare with a phone today?

ENIAC drew about 150 kilowatts to perform roughly 5,000 additions per second in 1945. A current smartphone carries out billions of operations per second on a small rechargeable battery. The energy spent per operation has fallen by many orders of magnitude, which is the single clearest measure of how far computing efficiency has come in eighty years.

What is Dennard scaling, and why did it matter?

Dennard scaling, described by Robert Dennard in 1974, held that as transistors shrink, their power density stays roughly constant. This let chipmakers add more transistors and run them faster each generation without the total power climbing. It was the engine behind decades of rising clock speeds, and its breakdown around 2005 reshaped how all processors are designed.

Why did processor clock speeds stop climbing around 2005?

Below roughly the 90-nanometer scale, current leakage and threshold voltage stopped scaling cleanly, so power density rose with each generation instead of staying flat. Chips hit a thermal limit known as the power wall, leaving practical frequencies stuck near 4 gigahertz. Intel canceled high-frequency designs in 2004, and the industry shifted toward adding cores rather than raising speed.

What is Koomey’s law?

Koomey’s law, named for analyst Jonathan Koomey, observes that the number of computations possible per joule of energy doubled about every 1.57 years from the 1950s onward. The trend held with high statistical consistency for over half a century. After 2000 the doubling time slowed to roughly 2.6 years, and a 2024 study placed the recent figure near 2.29 years.

How much power does an exascale supercomputer need?

The Frontier system reached one exaflop in 2022 while drawing about 21 megawatts, just inside a 20-megawatt target DARPA set in 2008. El Capitan, the fastest machine through late 2025, posts 1.809 exaflops at close to 30 megawatts. These figures mean a single supercomputer now consumes the power of a small town.

How much electricity do data centers use, and where is it heading?

The International Energy Agency estimated data center electricity use at roughly 415 to 460 terawatt-hours in 2024. It projects that figure will roughly double to around 945 terawatt-hours by 2030, near 3 percent of global demand. Usage rose about 17 percent in 2025, with AI-focused facilities growing fastest of all.

Is AI making computing more or less efficient?

Both at once, in a sense. The IEA reports that energy used per AI task is falling rapidly, an unusually fast efficiency gain. Total consumption still rises, because cheaper computing draws far more of it, as more people use the tools and as continuously running AI agents spread. Efficiency and demand are climbing together rather than canceling out.

What is Landauer’s limit?

Landauer’s limit, set out by Rolf Landauer in 1961, is the minimum energy that must be released as heat when one bit of information is erased. At room temperature it equals about 2.9 times 10 to the minus 21 joules. It marks a physical floor for conventional computing, far below what current chips actually spend per operation.

Did the move to multiple cores solve the power problem?

It eased the immediate crisis without removing it. Splitting work across many cores let performance keep rising at sustainable clock speeds. Many programs cannot be fully parallelized, so doubling cores rarely doubles speed, and packing in more transistors than the power budget can switch at once creates idle, powered-down regions known as dark silicon.

Will computing keep getting more energy efficient?

Efficiency is expected to keep improving, though more slowly than during the peak of Dennard scaling. Conventional chips still sit far above the Landauer floor, leaving substantial headroom. Reversible computing offers a theoretical path to go further by avoiding the energy cost of erasing bits, but practical reversible processors remain difficult to build.

Appendix: Glossary of Key Terms

ENIAC

The Electronic Numerical Integrator and Computer, completed in 1945 at the University of Pennsylvania. It used more than 17,000 vacuum tubes, drew about 150 kilowatts, and performed roughly 5,000 additions per second, making it one of the first general-purpose electronic computers.

Vacuum Tube

An early electronic switching device that controls current using electrodes inside a sealed glass envelope. Vacuum tubes generated substantial heat, consumed considerable power, and failed frequently, which limited the size and reliability of the computers built from them before the transistor arrived.

Transistor

A solid-state switch first built at Bell Labs in 1947. It performs the same on-off function as a vacuum tube but uses a tiny fraction of the energy, generates far less heat, and can be made microscopically small, making it the basic building block of all later computing.

Integrated Circuit

A single piece of semiconductor material holding many interconnected transistors, developed in the late 1950s by Jack Kilby and Robert Noyce. Integrated circuits allowed thousands and eventually billions of transistors to be manufactured together, sharply lowering the cost and power of each component.

Moore’s Law

The observation, made by Gordon Moore in 1965 and revised in 1975, that the number of transistors economically placed on a chip doubles roughly every two years. It described a steady rise in computing capability per chip and guided industry planning for decades.

Dennard Scaling

A principle from a 1974 paper by Robert Dennard stating that as transistors shrink, their power density remains roughly constant. It allowed faster, denser chips at stable power for about thirty years until it broke down around 2005.

Power Density

The amount of power consumed or dissipated per unit of chip area, usually measured in watts per square centimeter. Rising power density produces heat that must be removed, and it became the central obstacle once Dennard scaling failed.

Power Wall

The practical ceiling on processor clock frequency, near 4 gigahertz, that the industry encountered around 2005. Pushing past it generates more heat than chips can shed affordably, so designers turned to multiple cores rather than higher speeds.

Multicore Processor

A chip containing several independent processing cores that share work in parallel. Multicore designs let performance keep rising after the power wall stopped clock speeds from climbing, though not all software can use many cores effectively.

Dark Silicon

The portion of a chip’s transistors that must stay powered down at any moment because the power budget cannot switch all of them at once. The term, popularized in a 2011 study, captures a limit on how far adding cores can scale.

Koomey’s Law

An observation by Jonathan Koomey that computations per joule of energy doubled about every 1.57 years from the 1950s, later slowing after 2000. It tracks the efficiency of computing, complementing Moore’s Law’s focus on transistor count.

FLOPS

Floating-point operations per second, a standard measure of computing performance for scientific work. Prefixes scale the figure, so a petaflop is a quadrillion operations per second and an exaflop is a quintillion, used to rank the world’s fastest supercomputers.

Exascale Computing

A class of supercomputing capable of at least one exaflop, or a quintillion calculations per second. The first verified exascale system, Frontier, appeared in 2022, and such machines draw tens of megawatts of electricity.

Landauer’s Limit

The minimum energy that must be dissipated as heat when one bit of information is erased, identified by Rolf Landauer in 1961. At room temperature it is about 2.9 times 10 to the minus 21 joules, marking a physical floor beneath conventional computing.